Circuit for the raster writing conversion of data to be reproduced on a video screen

ABSTRACT

A circuit for the raster writing conversion of data to be reproduced on a video screen as symbols including symbols with downward appendages is provided. The circuit includes a symbol generator, a symbol address storage comprising an input to the symbol generator, and a raster line counter comprising another input to the symbol generator. The address storage transmits a multidigit binary signal representation of the symbol to be reproduced (e.g., ASCII code). The circuit further comprises a discriminator connected in parallel to the symbol address storage. The discriminator includes logic means for detecting a signal representative of a symbol having a downward appendage, switch means activated by the discriminator, and a recoding circuit adapted to advance the output of the raster counter. In the first position, the switch means interconnect the output of the raster counter directly to the symbol generator while in the second position, the output of the raster counter is connected to the symbol generator through the recoding circuit so that upon the detection of a symbol having a downward appendage, the raster lines are shifted downward.

United States Patent Beuter et CIRCUIT FOR THE RASTER WRITING [75] Inventors: Rudolf Beuter; Walter Reissmann;

Rudolf Cesal, all of Fuerth, Germany {73] Assignee: GRUNDIG E.M.V.

Elektro-Mechanische Versuchsanstalt Max Grundig, Fuerth, Germany [22] Filed: Jan. 27, 1975 [2i] Appl. No.1 544,040

[30] Foreign Application Priority Data Apr. 24, 1974 Germany 2419733 [52] US. Cl. 340/324 AD; 315/383 [51] Int. Cl. G06F 3/14 [58] Field of Search 340/324 AD; 315/383 [56] References Cited UNITED STATES PATENTS 3,559,207 1/1971 Atkinson 340/324 AD 3,568,178 3/1971 Day 340/324 AD 3,303,583 4/1974 Manber..... 340/324 AD 3,368,672 2/1975 Johnson 111111 340/324 AD 3,868,673 2/1975 Mau et a1 340/324 AD 3,877,007 4/1975 Fishman 340/324 AD Primary ExaminerDavid L. Trafton ABSIRACT A circuit for the raster writing conversion of data to be reproduced on a video screen as symbols including symbols with downward appendages is provided. The circuit includes a symbol generator, a symbol address storage comprising an input to the symbol generator, and a raster line counter comprising another input to the symbol generator. The address storage transmits a multidigit binary signal representation of the symbol to be reproduced (e.g., ASCll code). The circuit further comprises a discriminator connected in parallel to the symbol address storage. The discriminator includes logic means for detecting a signal representative of a symbol having a downward appendage, switch means activated by the discriminator, and a recoding circuit adapted to advance the output of the raster counter. In the first position, the switch means interconnect the output of the raster counter directly to the symbol generator while in the second position, the output of the raster counter is connected to the symbol generator through the recoding circuit so that upon the detection of a symbol having a downward appendage, the raster lines are shifted downward.

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US. Patent Nov. 4, 1975 Sheet 4 of4 3,918,040

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CIRCUIT FOR THE RASTER WRITING CONVERSION OF DATA TO BE REPRODUCED ON A VIDEO SCREEN BACKGROUND OF THE INVENTION The present invention relates to a circuit for the video reproduction of alpha numeric symbols in the form of a 7 X 5 matrix wherein the downward appendages of certain of the symbols (such as lower case letters p, q, y, etc.) depend below the bottom of the symbols without such appendages.

There are two basically different principles for generating writing on video screens, vector writing and raster writing. In the vector writing process, two analog output voltages are generated which are applied to the video screen device in a suitable fashion. The video screen device then operates as an X-Y oscilloscope to produce the desired characters one at a time. By contrast, in the raster writing process, an artificial video signal is generated to produce the desired character piecemeal as the electron beam sweeps across the video screen.

The advantage of the raster writing process is that the video screen utilized may comprise any conventional video tube whereas a special tube is required for the vector writing process. In addition, all the auxiliary equipment compatible with conventional video screens (i.e., video monitors, video cross bars, video recorders, etc.) may also be utilized with the raster writing process.

Prior to the development of LSI (Large Scale Integrated) circuits, the vector writing process was more economical to practice because of the large storage capacities required in the raster writing process. This is no longer the case in view of the relatively inexpensive semi-conductor storage devices now available.

In the raster writing process, presentation of alpha numeric symbols (as well as special symbols such as &, i etc.) is achieved with the aid of a 7 X 5 point matrix. For reasons to be explained forthwith, heretofore,

the 7 X 5 point matrix did not permit the representation" of letters or symbols with downward appendages (such as lower case letters j, p, q, etc. To generate such symbols utilizing prior art techniques would require a 9 X 5 point matrix. The use of a 9 X 5 point matrix, in turn, would require special logic components such as symbol generators and the like not readily available at this time.

In raster writing (as distinct from vector writing) the electron beam does not completely write one symbol before it begins the next. Instead, each raster line runs continuously over the video screen from left to right and produces the elements of each of the individual symbols which lie in the raster line. Thus, for raster writing, the 35 bits of the individual symbols must be broken down into seven words of five bits each. Referring to FIG. 1, a representative symbol (the letter H) is shown with the five bits of one word outlined by the block 100.

The ASCII code (American Standard Code for Information Interchange) permits data transmission to occur in the form of a seven digit binary number in accordance with the table of FIG. 2. The transmitted ASCII code words must be decoded so that the symbol associated with each word can be formed by the electron beam of a video monitor as it sweeps across the video screen. Decoding of the information is done with the aid of a digital-video converter. While 35-bit coding could be sent over the transmission lines to produce the desired symbol, (to make the digital-video converter unnecessary) such a procedure would be very uneconomical in light of the existence of the ASCII code. The reason for this is that out of the 35 bits to be transmitted, 28 (i.e., 35-7) would be redundant. In addition, for a given transmission rate, 35-bit coding would require five times as much time as the 7-bit coding of the ASCII code.

To utilize ASCII coding, for each of the symbols to be represented, the 35 points of each symbol matrix must be stored in a static fixed value storage element such as a Read Only Memory (ROM). The capacity of such a memory can be up to 128 X 35 4480 bits. This fixed value storage element serves as the symbol generator for decoding the ASCII code. The symbol generator is organized into 128 X 7 896 words of five bits each. The symbol generator is controlled by a symbol address (e. g., 7-bit ASCII code) coming from the image reproduction storage so that the desired code word (i.e., block is available at the output of the symbol generator when required. This will be considered in more detail forthwith.

Referring briefly to F IG. 3 wherein the symbols to produce the word GRUNDIG are shown, it can be noted that the first code word 100 of the individual symbols G-R-U-N-D-I-G are first written across the first line (line address 000) by the electron beam 103. Similarly, the second code words of the individual symbols are written during the second raster line (line address 001) etc. Thus, during each raster line the line address remains constant. Similarly, with each new raster line, the line address changes but the code words for each symbol repeat in the same sequence. A repeat storage element is therefore required to generate an entire line of text to ensure the proper sequence on each line. The repeat storage element makes a complete cycle during each raster line (every 64 p. s). Shift registers are well suited as repeat storage elements in order to obtain the necessary sequence of code words 100 of the individual symbols of a text line. The output of the shift register need only be connected to its input. Furthermore, a raster line counter is required which counts the storage cycles and the raster lines and which switches the line addresses ahead by one unit after each cycle.

In actual practice, utilizing a conventional video screen, twenty four text lines are simultaneously shown on the video screen. Consequently, one repeat storage element for one text line is not sufficient to store the entire content of the video screen and additional storage is required. The storage elements not only contain the text lines which are being written by the electron beam but also the text lines which are not being written. The repeat storage element (shift register) is therefore divided into two sections, line storage and image storage. In the line storage section the text line currently being written is stored. The remaining lines are held in the image storage section.

Each text line (including gap spaces) consists of II raster lines. As stated previously, seven raster lines are required for representing the symbols. The remaining four raster lines are for the gap between individual text lines. In this regard, one raster line is located over the seven symbol lines and always remains dark. Three raster lines are located beneath the symbol lines and heretofore have also remained dark. In the line over the text, there usually occurs data exchange between the line storage and image storage sections of the repeat storage element. The text line which is to be written next is obtained from the waiting queue in the image storage and is inserted into the line storage element. At the same time, the text line, whose writing has just been Completed, is inserted from the line storage element into the waiting queue of the image storage. The entire process repeats every 20 ms, corresponding to the image repetition frequency of 50 Hz. For presentation on the video screen, a video signal preferably without line jump is utilized. This is not an absolute requirement, however, and video signal with line jump can also be used for representing the symbols.

Referring briefly to FIG. 5, symbol generator 101 is shown having five parallel output lines (shown by the solid lines). Each output line is associated with one bit of a code word 100 of the 7 X 5 point matrix. Symbol generator 101 is controlled by a symbol address (e.g., 7-bit ASCII code) which comes from the image reproduction storage. In this way, the desired code word 100 is available at the output of the symbol generator 101. The five bits of each code word 100 appear simulta neously in parallel on the five output lines of the symbol generator 101 and are converted in series by a shift register which works as a parallel-series converter 102. It should be noted that in addition to the five parallel inputs to the parallel-series converter 102, there are two additional parallel inputs. These two additional inputs (shown as dotted lines) are solidly grounded (logic so that a gap of two image points exist between the individual code words 100 and thereby also between the individual symbols of a line of text. (i.e., referring to FIG. 3 again, the additional lines provide the gap between the letters G and R, R and U, etc.). The symbol generator 101 is also controlled by a raster line counter 104 which counts the storage cycles and the raster lines and which switches line addresses ahead by one unit after each cycle.

In accordance with the above description which represents the heretofore existing state of the art, data representation on a video screen cannot include symbols with downward appendages. Thus, in reproducing the letters g, j, p, q and y, a rather unaesthetic image resulted. Note, for example, the third symbol of figure 4A which should be a p. I-Ieretofore, the only means for overcoming this disadvantage has been to utilize a 9 X 5 point matrix.

In view of the above, it is the principal object of the present invention to provide a circuit which enables the video representation of symbols with downward appendages (such as the third symbol of figure 4B which is a lower case p) utilizing a 7 X 5 matrix and standard components.

SUMMARY OF THE INVENTION The above and other objects and advantages are attained in accordance with the present invention by providing a circuit for the raster writing conversion of data to be reproduced on a video screen which comprises a symbol generator, a symbol address storage comprising an input to the symbol generator, and a raster line counter comprising another input to the symbol generator. The symbol address storage transmits a multidigit binary signal representation of the symbol to be reproduced (e.g., ASCII code). The circuit further comprises a discriminator connected in parallel to the symbol address storage lines (12I through 127). The discriminator includes logic means for detecting a signal representative of a symbol having a downward appendage, switch means activated by the discriminator, and a recoding circuit adapted to advance the output of the raster counter. In the first position, the switch means interconnect the output of the raster counter directly to the symbol generator while in the second position the output of the raster counter is connected to the symbol generator through the recoding circuit so that upon the detection of a symbol having a downward ap pendage, the raster lines are shifted downward.

BRIEF DESCRIPTION OF THE DRAWINGS In the accompanying drawings, some of which have been discussed already:

FIG. 1 depicts a 7 X 5 point matrix conventionally utilized to represent symbols on a video screen;

FIG. 2 is the ASCII code table for converting 7-digit binary numbers into alpha numeric and special characters and vice versa;

FIG. 3 depicts a video representation of a line of text;

FIG. 4A depicts a line of text including a symbol which should but does not have a downward appendage',

FIG. 4B depicts a line of text of 4A as produced in accordance with the present invention wherein one of the symbols has a downward appendage;

FIG. 5 is a block diagram representation of a circuit arrangement in accordance with the present invention; and,

FIG. 6 is a logic diagram of the discriminator utilized in the block diagram of FIG. 5.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Reference is now made to FIG. 5 wherein the improvement of the present invention is depicted. As stated previously, the symbol addresses from the image repeat storage (e. g., 7-bit ASCII code) is brought to the symbol generator 101 over seven parallel input lines 121-127. The information which is to be written on a particular one of the seven lines (000- of FIG. 3) of the 7 X 5 point matrix is determined by three additional inputs 111, 112 and 113 to the symbol generator. These additional inputs are governed by the raster line counter 104.

The seven input lines 121 through 127 of the symbol generator are also connected with the inputs 131 through 137 of a discriminator 105. As will be described in some detail forthwith, the discriminator 105 serves to determine addresses of symbols with downward appendages and upon such determination to generate a signal along line to electronic switch 140 to activate the switch and shilt it from a first position to a second position. Whereas, in the first switch position, the raster line counter 104 is connected directly to the inputs 111, 112 and 113 to the symbol generator through switch 140, in the second position the raster line counter is connected to the inputs 111, 112 and 113 through a recoding circuit 106. The function of the recoding circuit is to recode the line address so that the 7 X 5 point matrix on the video screen is shifted two raster lines downward. This downward shift results in the desired downward appendage. The effect of this downward shift may best be appreciated by a comparison of the letter p (second occurrence) of FIG. 48 with that of FIG. 4A. The recoding circuit can consist of logic elements or of a fixed value storage device. As stated previously, a gap of at least 2 raster lines exist between any two text lines so that the next text line is in no way interfered with by the downward shift.

Details of discriminator 105 are depicted in FIG. 6. Referring briefly to the ASCII table of FIG, 2, it can be seen that the symbol addresses for two of the symbols for which the shift is desired, p and g respectively are 1110000 and 1100111. In the first case, the inputs 131 through 133 of discriminator 105 are connected with an AND gate 150 and inputs 134 through 137 of discriminator 105 are connected with a NOR gate 151. The output signals of gates 150 and 151 comprise inputs to AND gate 152. The output of gate 152, in turn, forms an input to an OR gate 153. The output of OR gate 153 appears on line 130 to activate switch 140. Similarly, an additional input to OR gate 153 is obtained from the logic associated with symbol g, i.e., when symbol address 1100111 is transmitted. In this regard, inputs 131, 132, 135, 136 and 137 of discriminator 105 are simultaneously connected with an AND gate 154. Inputs 133 and 134 of discriminator 105 are connected with a NOR gate 155. The output signals of gates 154 and 155 are fed to an AND gate 156 the output of which comprises an additional input to OR gate 153. It should be understood that in a similar manner, logic subcircuits for the other symbols with downward appendages (i.e., j, q, and y) are provided each with an input to OR gate 153 as shown in phantom.

Thus, in accordance with the above, the aforementioned objects are effectively attained.

Having thus described the invention what is claimed is:

1. In a circuit for the raster writing conversion of data to be reproduced on a video screen as symbols in a matrix with a gap between symbol lines, said circuit being of the type having a symbol generator, a symbol address storage comprising an input to said symbol generator, said storage transmitting a multidigit binary signal representation of the symbol to be reproduced and a raster line counter comprising another input to said symbol generator, said counter being adapted to shift ahead by one line after each raster line sweep of the video screen, the improvement comprising: a discriminator connected in parallel to said symbol address storage lines, said discriminator including logic means for detecting a multidigit binary signal from said symbol address storage representative of a symbol having a downward appendage, switch means activated bysaid discriminator to shift from a first position to a second position interposed between said raster counter and said symbol generator, said switch means first position interconnecting the output of said raster counter directly to said symbol generator and said second position interconnecting the output of said raster counter and said symbol generator through a recoding circuit, and a recoding circuit adapted to advance the output of said raster counter.

2. The invention in accordance with claim 1 wherein said discriminator comprises only AND, NOR and OR logic components. 

1. In a circuit for the raster writing conversion of data to be reproduced on a video screen as symbols in a matrix with a gap between symbol lines, said circuit being of the type having a symbol generator, a symbol address storage comprising an input to said symbol generator, said storage transmitting a multidigit binary signal representation of the symbol to be reproduced and a raster line counter comprising another input to said symbol generator, said counter being adapted to shift ahead by one line after each raster line sweep of the video screen, the improvement comprising: a discriminator connected in parallel to said symbol address storage lines, said discriminator including logic means for detecting a multidigit binary signal from said symbol address storage representative of a symbol having a downward appendage, switch means activated by said discriminator to shift from a first position to a second position interposed between said raster counter and said symbol generator, said switch means first position interconnecting the output of said raster counter directly to said symbol generator and said second position interconnecting the output of said raster counter and said symbol generator through a recoding circuit, and a recoding circuit adapted to advance the output of said raster counter.
 2. The invention in accordance with claim 1 wherein said discriminator comprises only AND, NOR and OR logic components. 